Digital-to-analog converters: weighted resistor and R-2R

Binary-weighted resistor and R-2R ladder DACs: output equations, resolution, full scale, resistor matching, linearity and settling, with worked numericals.

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Why it matters

A digital controller drives a valve positioner, a 4–20 mA transmitter output or a function generator through a digital-to-analog converter (DAC). DACs also sit inside successive-approximation ADCs. The two classic resistor networks, binary-weighted and R-2R ladder, show clearly how resolution, accuracy and resistor matching trade against each other.

Key ideas

What a DAC does. An n-bit DAC converts a digital word D = bₙ₋₁…b₁b₀ (an integer from 0 to 2ⁿ − 1) into an output proportional to it: V_o = K·D. The step size for one count is the resolution (1 LSB). The MSB alone gives half of the reference.

Binary-weighted resistor DAC. Each bit switches a resistor between the reference V_R and ground (or leaves it open), and all resistors feed the virtual-ground input of an inverting op-amp summing amplifier. The MSB resistor is R, the next 2R, then 4R, … up to 2ⁿ⁻¹R for the LSB, so the currents are binary-weighted: Iᵢ = bᵢ·V_R / (2ⁿ⁻¹⁻ⁱ·R). The op-amp converts the total current into V_o = −R_f·ΣIᵢ.

  • Simple and fast for few bits.
  • Needs n different, precisely ratioed resistor values spanning a ratio of 2ⁿ⁻¹ (128:1 for 8 bits). Large values are hard to make accurately on a chip and small ones load the reference and switches. The MSB resistor needs a tolerance of about 1/2ⁿ, which is impractical beyond about 6–8 bits.

R-2R ladder DAC. Uses only two values, R and 2R. Looking into any node of the ladder towards the LSB end, the resistance is 2R in parallel with 2R = R, so at each node the current splits equally. In the current-mode (inverting) form each 2R leg is switched either to the op-amp's virtual ground (bit = 1) or to real ground (bit = 0); the leg currents are V_R/2R, V_R/4R, V_R/8R, … from the MSB down, and because both switch positions are at 0 V the current drawn from the reference is constant, V_R/R, whatever the code. With R_f = R, V_o = −V_R·D/2ⁿ.

  • Only two resistor values that need to match well (easy on a chip with laser trimming), so it scales to 12–16 bits and more.
  • Constant reference loading and constant switch voltages give fast, clean settling.
  • In the voltage-mode form the ladder output node is buffered by a non-inverting follower: V_o = +V_R·D/2ⁿ.

Specifications.

  • Resolution: number of bits n, or step size V_LSB = V_FS(nominal)/2ⁿ; often quoted as a percentage, 100/2ⁿ %.
  • Full-scale output: the output for all 1s, which is (2ⁿ − 1)·V_LSB, one LSB less than the reference-based nominal range.
  • Accuracy: deviation of actual from ideal output, including offset and gain errors.
  • Linearity: integral non-linearity (INL), the deviation from a straight line, and differential non-linearity (DNL), the deviation of each step from 1 LSB. If DNL is worse than −1 LSB the DAC is non-monotonic: increasing the code can lower the output, which is dangerous inside a control loop.
  • Settling time: time for the output to settle within ±½ LSB after a full-scale change.
  • Glitch: transient spike at major code transitions (e.g. 0111 → 1000) when switches do not change simultaneously.

Connection. The same DAC appears in the feedback path of a successive-approximation ADC, so its linearity limits that ADC's accuracy.

Formulas

V_o = −V_R · (R_f / R) · Σ bᵢ · 2ⁱ⁻⁽ⁿ⁻¹⁾ (weighted resistor, MSB resistor R)

  • V_R: reference (V); R_f: feedback resistor (Ω); bᵢ: bit i (0 or 1). With R_f = R/2: V_o = −V_R · D / 2ⁿ.

V_o = −V_R · (R_f / R) · D / 2ⁿ (R-2R current-mode ladder; R_f = R gives −V_R · D / 2ⁿ)

  • D: decimal value of the input word.

V_LSB = V_R / 2ⁿ (for V_o = V_R·D/2ⁿ)

V_FS = V_R · (1 − 2⁻ⁿ) = (2ⁿ − 1) · V_LSB

% resolution = 100 / 2ⁿ (some texts use 100/(2ⁿ − 1))

Resistor spread (weighted) = 2ⁿ⁻¹

MSB tolerance for ±½ LSB error ≈ 1 / 2ⁿ

Worked examples

Example 1 (standard). A 4-bit weighted-resistor DAC has R = 10 kΩ (MSB), 20 kΩ, 40 kΩ, 80 kΩ (LSB), R_f = 5 kΩ and V_R = 5 V. Find V_o for input 1011.

  1. Currents for bits that are 1: MSB I₃ = 5 V / 10 kΩ = 0.5 mA; bit 1: I₁ = 5 V / 40 kΩ = 0.125 mA; bit 0: I₀ = 5 V / 80 kΩ = 0.0625 mA. Bit 2 is 0.
  2. Total I = 0.5 + 0.125 + 0.0625 = 0.6875 mA.
  3. V_o = −R_f·I = −5 kΩ × 0.6875 mA = −3.4375 V.
  4. Check with V_o = −V_R·D/2ⁿ (valid because R_f = R/2): −5 × 11/16 = −3.4375 V.

Answer: V_o = −3.44 V

Example 2 (GATE level). An 8-bit current-mode R-2R DAC has V_R = 10 V, R = 10 kΩ and R_f = R. Find (a) the resolution, (b) V_o for input 10110100, (c) the full-scale output, (d) the current drawn from the reference.

  1. (a) V_LSB = V_R / 2⁸ = 10 / 256 = 39.06 mV.
  2. (b) D = 10110100₂ = 128 + 32 + 16 + 4 = 180. V_o = −10 × 180/256 = −7.031 V.
  3. (c) V_FS = −10 × 255/256 = −9.961 V.
  4. (d) The ladder presents R to the reference at every code: I = V_R / R = 10 V / 10 kΩ = 1 mA.

Answer: (a) 39.06 mV (b) −7.03 V (c) −9.96 V (d) 1 mA, constant

Example 3 (matching). What tolerance must the MSB resistor of an 8-bit weighted-resistor DAC have so that its error alone stays within ½ LSB?

  1. The MSB contributes 2ⁿ⁻¹ LSB = 128 LSB.
  2. A fractional error δ gives δ × 128 LSB ≤ ½ LSB → δ ≤ 1/256.
  3. δ ≤ 0.39 %.

Answer: about ±0.39 % (and correspondingly ±0.78 % for the next bit)

Common mistakes

  • Reading the bits in reverse and giving the MSB the smallest weight (1101 is 13/16 of the reference, not 11/16).
  • Forgetting the minus sign of the inverting summing amplifier.
  • Claiming the full-scale output equals V_R: it is V_R(1 − 2⁻ⁿ).
  • Putting the largest resistor on the MSB in a weighted DAC (the MSB gets the smallest resistor and largest current).
  • Assuming R-2R needs fewer resistors: it needs about 2n, more than the n of the weighted type; its advantage is only two values.

For GATE IN

Expect output-voltage calculations for a given code and network (weighted, R-2R, sometimes with a non-standard R_f), resolution and full-scale questions, currents in individual ladder branches, the effect of a switch or resistor fault, and monotonicity or linearity concepts. Practise finding node voltages in an R-2R ladder using the "R looking right" property.

Quick check

  1. A 4-bit DAC with V_o = V_R·D/2ⁿ and V_R = 8 V: output for 0110?
  2. A 10-bit DAC with 10.24 V reference: LSB size?
  3. How many different resistor values does a 12-bit R-2R ladder need?
  4. What resistance does an R-2R ladder present to its reference?

Answers: 1. 3 V 2. 10 mV 3. Two 4. R

Interview questions

All Digital Electronics and Microcontrollers interview questions

Try answering each one aloud before you open it.

  1. 1.What is a digital-to-analog converter (DAC) and why is it important in digital electronics?Concept

    A digital-to-analog converter (DAC) is a device that converts digital data, usually binary, into an analog signal. It is important in digital electronics because many real-world signals are analog, and DACs allow digital systems to interface with these analog signals, enabling applications like audio playback, video display, and sensor data processing.

  2. 2.Explain the working principle of a weighted resistor DAC.Concept

    A weighted resistor DAC uses a set of resistors with different values to convert a binary number into an analog voltage. Each bit of the binary number controls a switch that connects a corresponding resistor to a reference voltage. The resistors are weighted according to their binary significance, with the most significant bit having the smallest resistor value. The combined current through the resistors produces an output voltage proportional to the binary input.

  3. 3.Describe the R-2R ladder DAC and its advantages over the weighted resistor DAC.Concept

    An R-2R ladder DAC uses a repeating structure of resistors with only two values: R and 2R. This configuration simplifies the design and manufacturing process because it requires only two resistor values, reducing errors due to resistor tolerance. The R-2R ladder DAC is more scalable and easier to implement for higher bit resolutions compared to the weighted resistor DAC, which requires precise resistor values for each bit.

  4. 4.Why is the R-2R ladder DAC preferred in integrated circuits over the weighted resistor DAC?Application

    The R-2R ladder DAC is preferred in integrated circuits because it requires only two resistor values, making it easier to fabricate with high precision and consistency. This reduces the complexity and cost of manufacturing. Additionally, the R-2R ladder structure is more compact and scalable, which is advantageous for integrating into ICs where space is limited.

  5. 5.What happens if one of the resistors in an R-2R ladder DAC is faulty?Application

    If one of the resistors in an R-2R ladder DAC is faulty, it can cause incorrect output voltages, leading to errors in the analog signal. The impact depends on the position of the faulty resistor; a fault in a resistor associated with a more significant bit will have a larger effect on the output. This can result in distortion or incorrect representation of the digital input as an analog signal.

  6. 6.How does the resolution of a DAC affect its performance?Concept

    The resolution of a DAC, typically measured in bits, determines the smallest change in analog output that can be produced for a change in digital input. Higher resolution means finer granularity and more precise analog output. A DAC with higher resolution can produce smoother and more accurate analog signals, which is crucial for applications requiring high fidelity, such as audio and video processing.

  7. 7.Calculate the output voltage of a 3-bit R-2R ladder DAC with a reference voltage of 5V and a binary input of 101.Numerical

    To calculate the output voltage of a 3-bit R-2R ladder DAC, we consider the binary input 101. The most significant bit (MSB) is 1, the middle bit is 0, and the least significant bit (LSB) is 1. The output voltage V_out is given by: V_out = V_ref * (b2/2 + b1/4 + b0/8), where b2, b1, and b0 are the binary bits. Substituting the values, V_out = 5V * (1/2 + 0/4 + 1/8) = 5V * (0.5 + 0 + 0.125) = 5V * 0.625 = 3.125V.

  8. 8.What are the limitations of a weighted resistor DAC?Concept

    The limitations of a weighted resistor DAC include the need for precise resistor values, which can be difficult and expensive to achieve, especially for high-resolution DACs. The resistors must have very tight tolerances to ensure accurate conversion, and any deviation can lead to significant errors. Additionally, the design becomes impractical for higher bit resolutions due to the exponential increase in resistor values required.

  9. 9.Explain how a DAC can be used in audio applications.Application

    In audio applications, a DAC converts digital audio data into an analog signal that can be amplified and played through speakers or headphones. The digital audio data, often stored in formats like MP3 or WAV, is processed by the DAC to produce a continuous analog waveform that represents the sound. The quality of the DAC affects the fidelity of the audio output, making it a critical component in audio playback devices.

  10. 10.If a 4-bit weighted resistor DAC has a reference voltage of 10V, what is the smallest change in output voltage it can produce?Numerical

    The smallest change in output voltage for a DAC is determined by its resolution. For a 4-bit DAC, there are 2^4 = 16 possible output levels. The smallest change, or least significant bit (LSB) voltage, is the reference voltage divided by the number of levels: LSB = V_ref / 16. Substituting the given reference voltage, LSB = 10V / 16 = 0.625V. Therefore, the smallest change in output voltage is 0.625V.

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