Comparators, encoders and arithmetic circuits

Digital magnitude comparators, encoders and priority encoders, code converters, subtractors, array multipliers and BCD adders with worked examples.

Drafted with Aria, reviewed by the AiCanCode.org team. Spotted an error? Use Give Feedback at the bottom of the page.

Why it matters

Alarm and trip logic in an instrumentation system constantly asks "is the reading above the set-point?", which is a digital magnitude comparator. Keypads, interrupt controllers and shaft position sensors need encoders to turn one active line into a binary code, and every processor needs subtractors and multipliers. These blocks complete the combinational toolkit that started with adders, multiplexers and decoders.

Key ideas

Magnitude comparator. Compares two unsigned binary numbers A and B and asserts one of three outputs: A > B, A = B, A < B.

  • 1-bit: (A > B) = AB′, (A < B) = A′B, (A = B) = (A ⊕ B)′ = AB + A′B′.
  • n-bit: define the bit-equality xᵢ = (Aᵢ ⊕ Bᵢ)′. A = B only if every xᵢ = 1. A > B if the most significant unequal bit has Aᵢ = 1, Bᵢ = 0; so the comparison proceeds from the MSB down.
  • The 4-bit IC 7485 has cascade inputs (A > B, A = B, A < B from the less significant stage) so that comparators can be chained for 8, 12 or 16 bits. Tie the cascade inputs of the least significant stage to "equal".

Encoder. The reverse of a decoder: 2ⁿ input lines (only one assumed active) produce an n-bit code. An 8-to-3 (octal-to-binary) encoder has Y₂ = D₄ + D₅ + D₆ + D₇, Y₁ = D₂ + D₃ + D₆ + D₇, Y₀ = D₁ + D₃ + D₅ + D₇. Two weaknesses: if two inputs are active the output is the OR of their codes (meaningless), and "no input active" gives the same output 000 as D₀ active.

Priority encoder. Fixes both problems: when several inputs are active it outputs the code of the highest-priority one, and a valid (V, or GS) output says whether any input is active. The 74148 is an 8-to-3 priority encoder with active-low inputs and outputs and enable-in/enable-out pins for cascading. Uses: interrupt controllers, keyboard encoders, the thermometer-to-binary stage of a flash ADC.

Code converters. Combinational circuits translating one code to another: binary ↔ Gray (XOR chains), BCD ↔ excess-3, BCD to seven-segment. Each output is designed as a separate function of the input bits, with unused input codes as don't-cares.

Subtractors. Half subtractor: D = A ⊕ B, borrow Bₒ = A′B. Full subtractor (with borrow-in Bᵢ): D = A ⊕ B ⊕ Bᵢ, Bₒ = A′B + A′Bᵢ + BBᵢ. In practice subtraction uses an adder: A − B = A + B′ + 1 (2's complement). For unsigned operands, a carry-out of 1 means the result is positive and the carry is discarded; a carry-out of 0 means the result is negative and is in 2's complement form.

Binary multiplier. Multiplying an n-bit by an m-bit number forms n·m partial-product bits with AND gates (AᵢBⱼ) and adds the shifted rows with (m − 1) n-bit adders. The product has n + m bits. This is an array multiplier; sequential shift-and-add multipliers trade speed for hardware.

BCD adder. A 4-bit binary adder followed by a correction stage that adds 0110 when the sum exceeds 9; the decimal carry is C = K + Z₃Z₂ + Z₃Z₁, where K is the binary carry and Z₃…Z₀ the binary sum.

ALU. An arithmetic logic unit combines adders, logic gates and multiplexers, with function-select inputs choosing between operations such as add, subtract, AND, OR and compare, and sets status flags (carry, zero, sign, overflow).

Formulas

xᵢ = Aᵢ·Bᵢ + Aᵢ′·Bᵢ′ (bit equality, XNOR)

(A = B) = x₃·x₂·x₁·x₀

(A > B) = A₃B₃′ + x₃A₂B₂′ + x₃x₂A₁B₁′ + x₃x₂x₁A₀B₀′

(A < B) = A₃′B₃ + x₃A₂′B₂ + x₃x₂A₁′B₁ + x₃x₂x₁A₀′B₀

D = A ⊕ B ⊕ Bᵢ, Bₒ = A′B + A′Bᵢ + B·Bᵢ (full subtractor)

A − B = A + B′ + 1 (2's complement subtraction)

n × m array multiplier: n·m AND gates, (m − 1) n-bit adders, n + m product bits

Decimal carry in BCD adder: C = K + Z₃Z₂ + Z₃Z₁

Worked examples

Example 1 (standard). A 4-bit comparator receives A = 1011 and B = 1001. Determine the outputs.

  1. Bit 3: A₃ = B₃ = 1 → x₃ = 1.
  2. Bit 2: A₂ = B₂ = 0 → x₂ = 1.
  3. Bit 1: A₁ = 1, B₁ = 0 → x₁ = 0, and the term x₃x₂A₁B₁′ = 1·1·1·1 = 1.
  4. So (A > B) = 1, (A = B) = 0, (A < B) = 0. Check: 11 > 9.

Answer: A > B output HIGH

Example 2 (GATE level). (a) An 8-to-3 priority encoder (D₇ highest priority, active-high) has D₁, D₄ and D₅ HIGH. What is the output Y₂Y₁Y₀? What would a plain (non-priority) OR-type encoder give? (b) Compute 10101₂ − 01101₂ with a 5-bit 2's complement adder.

  1. (a) The highest active input is D₅ → Y₂Y₁Y₀ = 101, V = 1.
  2. A plain encoder ORs the codes 001, 100 and 101 → 101. Here it happens to agree, but with D₃ and D₄ active it would give 011 + 100 = 111 (code for D₇), a false result.
  3. (b) 2's complement of 01101: invert → 10010, add 1 → 10011.
  4. 10101 + 10011 = 1 01000 (carry out 1).
  5. Carry out = 1, so the result is positive; discard it: 01000 = 8. Check: 21 − 13 = 8.

Answer: (a) 101 (b) 01000₂ = 8

Example 3 (multiplier). Multiply A = 1101 by B = 1011 with a 4 × 4 array multiplier and state the hardware.

  1. Partial products (A shifted by each 1 bit of B): B₀ = 1 → 1101; B₁ = 1 → 11010; B₂ = 0 → 0; B₃ = 1 → 1101000.
  2. Sum: 1101 + 11010 + 1101000 = 13 + 26 + 104 = 143 = 10001111₂.
  3. Hardware: 4 × 4 = 16 AND gates and 3 four-bit adders; product width 8 bits.

Answer: 10001111₂ = 143; 16 AND gates, 3 four-bit adders

Common mistakes

  • Comparing from the LSB: the decision is set by the most significant unequal bit.
  • Forgetting to tie the cascade inputs of the lowest 7485 to "A = B", which makes the whole chain report unequal.
  • Assuming a plain encoder handles two active inputs, or that output 000 means D₀ is active.
  • Forgetting the +1 when subtracting by complementing, or misreading the end carry for unsigned operands.
  • Writing the borrow as AB′ instead of A′B (borrow occurs when the minuend bit is 0 and the subtrahend bit is 1).

For GATE IN

Expect: deriving or identifying comparator outputs for given inputs, output of a priority encoder for several active inputs (watch for active-low pins), subtraction by complements, the number of gates and adders in an array multiplier, and code converter design with don't-cares. Practise writing the A > B expression from the MSB down and checking it on one numeric example.

Quick check

  1. Write the 1-bit equality function.
  2. An 8-to-3 priority encoder with active-high inputs D₂ and D₆ HIGH (D₇ highest): output?
  3. Difference and borrow of a full subtractor for A = 0, B = 1, Bᵢ = 1?
  4. How many product bits does an 8 × 4 multiplier give?

Answers: 1. AB + A′B′ 2. 110 3. D = 0, Bₒ = 1 4. 12

Interview questions

All Digital Electronics and Microcontrollers interview questions

Try answering each one aloud before you open it.

  1. 1.What is a digital magnitude comparator?Concept

    A magnitude comparator is a combinational circuit that compares two binary numbers A and B and asserts one of three outputs: A > B, A = B or A < B. Equality needs every bit pair equal (AND of the XNORs of the bits), while A > B is decided by the most significant bit position where the numbers differ. ICs such as the 4-bit 7485 have cascade inputs so several can be chained for wider words. Note this is different from an analog voltage comparator, which compares two voltages.

  2. 2.Explain the working principle of an encoder.Concept

    A digital encoder does the reverse of a decoder: it has 2ⁿ input lines, of which one is assumed active, and produces the n-bit binary code of that line. In an 8-to-3 encoder each output bit is simply the OR of the inputs whose code has a 1 in that position, e.g. Y₀ = D₁ + D₃ + D₅ + D₇. A plain encoder gives wrong codes if two inputs are active and cannot tell 'D₀ active' from 'nothing active', which is why priority encoders with a valid output are used in practice.

  3. 3.What are arithmetic circuits, and why are they important in digital systems?Concept

    Arithmetic circuits are digital circuits used to perform arithmetic operations like addition, subtraction, multiplication, and division. They are crucial in digital systems for processing numerical data, enabling functions such as calculations in processors and data manipulation in digital signal processing.

  4. 4.Why are comparators used in analog-to-digital converters (ADCs)?Application

    Comparators are used in ADCs to compare the input analog signal with a reference voltage. This comparison helps determine the digital output code that represents the analog input. The speed and accuracy of the comparator directly affect the performance of the ADC.

  5. 5.How does a priority encoder differ from a regular encoder?Concept

    A priority encoder is a type of encoder that assigns priority to its inputs. If multiple inputs are active simultaneously, the priority encoder will output the binary code corresponding to the highest-priority active input. This is useful in applications where certain signals need to be prioritized over others.

  6. 6.An 8-to-3 priority encoder (D7 highest priority, active-high inputs) has inputs D2, D3 and D6 HIGH at the same time. What is its output?Numerical

    A priority encoder outputs the code of the highest-priority active input and ignores the rest. Of D2, D3 and D6 the highest is D6, so the output is Y2Y1Y0 = 110 and the valid output is 1. A plain OR-type encoder would instead output 010 OR 011 OR 110 = 111, which wrongly points to D7.

Finished this topic? Mark it so your progress, study plan and readiness keep up.

Stuck on something here?

PreviousCombinational circuits: adders, multiplexers, decodersNext Latches and flip-flops