Fabrication of MOSFETs

Why it matters

The fabrication of MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors) is a fundamental process in the creation of integrated circuits, which are the building blocks of all modern electronic devices. Understanding this process is crucial for designing efficient and reliable VLSI (Very Large Scale Integration) circuits used in everything from smartphones to supercomputers.

Key ideas

This is an educational overview of a conventional planar silicon process, not a complete manufacturing recipe. Actual foundry flows and gate-stack materials vary.

• Substrate Preparation: The process begins with a silicon wafer, which serves as the substrate. The wafer is cleaned to remove any impurities.
• Oxidation: A thin layer of silicon dioxide (SiO₂) is grown on the wafer surface through thermal oxidation, serving as the gate oxide.
• Photolithography: This technique is used to transfer a pattern from a photomask to the wafer. It involves coating the wafer with a light-sensitive material called photoresist, exposing it to UV light, and developing the pattern.
• Etching: The unwanted SiO₂ is removed using chemical or plasma etching, leaving behind the desired pattern.
• Doping: The process of adding impurities to the silicon to change its electrical properties. This is done using ion implantation or diffusion.
• Metallization: Metal contacts are formed to connect the MOSFET to other components. Aluminum or copper is typically used.
• Annealing: A heat treatment process that repairs damage to the silicon lattice caused by ion implantation and activates the dopants.

Formulas

The electrical example uses a long-channel NMOS saturation model, with body tied to source, V_GS > V_th and V_DS ≥ V_GS−V_th. Assume V_DS = 5 V and neglect channel-length modulation. The listed fabrication operations are repeated in a process-specific sequence, not necessarily the order of this overview.

• I_d = μ_n·C_ox·(W/L)·(V_gs - V_th)^2 / 2
  • I_d: Drain current (A)
  • μ_n: Electron mobility (m²/V·s)
  • C_ox: Oxide capacitance per unit area (F/m²)
  • W: Width of the MOSFET (m)
  • L: Length of the MOSFET (m)
  • V_gs: Gate-source voltage (V)
  • V_th: Threshold voltage (V)

Worked example

Given:

• Electron mobility, μ_n = 0.05 m²/V·s
• Oxide capacitance per unit area, C_ox = 3.45 x 10^-3 F/m²
• Width of the MOSFET, W = 10 μm = 10 x 10^-6 m
• Length of the MOSFET, L = 1 μm = 1 x 10^-6 m
• Gate-source voltage, V_gs = 5 V
• Threshold voltage, V_th = 1 V

1. Calculate the drain current using the formula: I_d = μ_n·C_ox·(W/L)·(V_gs - V_th)^2 / 2
2. Substitute the given values: I_d = 0.05 m²/V·s · 3.45 x 10^-3 F/m² · (10 x 10^-6 m / 1 x 10^-6 m) · (5 V - 1 V)^2 / 2
3. Calculate: I_d = 0.05 · 3.45 x 10^-3 · 10 · 16 / 2
4. I_d = 0.05 · 3.45 x 10^-3 · 10 · 8
5. I_d = 0.0138 A

Final Answer: I_d = 0.0138 A

Common mistakes

• Confusing the units of measurement, especially when converting micrometers to meters.
• Incorrectly applying the photolithography steps, leading to pattern misalignment.
• Neglecting the annealing process, which can result in incomplete dopant activation.

For GATE EC

Questions on this topic often involve calculating the electrical characteristics of MOSFETs, such as drain current, threshold voltage, and transconductance. Practicing problems on photolithography steps and doping techniques is also beneficial.

Quick check

1. What is the purpose of the gate oxide in a MOSFET?
2. Name two methods used for doping in MOSFET fabrication.
3. Why is annealing important in the fabrication process?

Answers: 1. To insulate the gate from the channel and control the flow of current. 2. Ion implantation and diffusion. 3. It repairs damage and activates dopants.