Serial communication: UART, SPI and I2C

Why it matters

A mechatronic board is a set of chips that must talk: the MCU reads an IMU over I2C, writes a display or an SD card over SPI, and sends data to a PC, a GSM modem or a Modbus network over a UART. Choosing the right bus, configuring its speed and estimating how long a transfer takes are everyday design tasks — and wrong baud or clock settings are among the most common bring-up failures.

Key ideas

Serial vs parallel, synchronous vs asynchronous. Serial links send one bit at a time over few wires. Synchronous links (SPI, I2C) carry a clock line, so the receiver samples on clock edges. Asynchronous links (UART) have no clock; both ends must agree on the bit rate beforehand.

UART (Universal Asynchronous Receiver-Transmitter).

• Wires: TX, RX (crossed between devices) and a common ground. Full-duplex, point-to-point.
• Frame: idle line is high (1). One start bit (0), 5–9 data bits sent LSB first, optional parity bit (even/odd), then 1 or 2 stop bits (1). The common format 8N1 uses 10 bits per byte.
• The receiver detects the falling edge of the start bit and samples each bit near its centre, usually with 16× oversampling. Because it resynchronises on every start bit, a total clock mismatch of about 2–3 % between the two ends is tolerable; more gives framing errors.
• Baud rate = symbols per second; for a two-level UART it equals bits per second.
• Electrical layers: TTL/CMOS levels on the board; RS-232 (±3 to ±15 V, inverted) to PCs; RS-485 (differential, multi-drop, up to about 1200 m) for industrial networks such as Modbus RTU.

SPI (Serial Peripheral Interface).

• Four lines: SCLK (from master), MOSI (master out, slave in), MISO (master in, slave out), and one active-low CS/SS per slave.
• Each transfer is an exchange: master and slave shift registers swap contents, so SPI is inherently full-duplex — to read a byte the master must clock out a (dummy) byte.
• Clock polarity and phase (CPOL, CPHA) give four modes 0–3; master and slave must use the same mode.
• No addressing, no acknowledge, push-pull drivers → clock rates of tens of MHz, but one CS pin per slave (or a daisy chain) and no built-in error checking.

I2C (Inter-Integrated Circuit).

• Two lines, SDA and SCL, both open-drain with pull-up resistors, shared by many devices; half-duplex.
• Every transfer begins with a START (SDA falls while SCL is high) and ends with a STOP (SDA rises while SCL is high). The master sends a 7-bit address plus a R/W bit; the addressed slave pulls SDA low in the 9th clock to ACK. Each data byte is likewise followed by an ACK/NACK, so a byte costs 9 clocks.
• Speeds: standard 100 kHz, fast 400 kHz, fast-plus 1 MHz (high-speed 3.4 MHz on some parts).
• Open-drain wiring allows clock stretching (a slow slave holds SCL low) and multi-master arbitration (a master that sends 1 but sees 0 backs off).
• Pull-up value: too small and devices cannot pull the line low; too large and the RC rise time with bus capacitance is too slow.

Choosing. UART for point-to-point links and long cables through RS-485; SPI for fast, short, few-device links (displays, flash, ADCs); I2C for many slow devices with only two pins (sensors, EEPROMs, RTCs).

Formulas

T_bit = 1 / baud

• T_bit = bit time (s); baud = bit rate for a two-level UART (bit/s).

t_frame = n_frame / baud, with n_frame = 1 + n_data + n_parity + n_stop

• For 8N1, n_frame = 10. Time to send one character (s).

UBRR = f_osc / (16 × baud) − 1 (AVR, normal speed)

• UBRR = baud-rate register (integer, rounded); f_osc = CPU clock (Hz). Actual baud = f_osc / (16 × (UBRR + 1)).

Error % = (baud_actual − baud_desired) / baud_desired × 100

TH1 = 256 − f_osc / (384 × baud) (classic 8051, Timer 1 mode 2, SMOD = 0)

• That is why 11.0592 MHz crystals are used: they give integer reload values.

t_I2C ≈ (9 × n_bytes) / f_SCL

• Approximate I2C transfer time (s); n_bytes includes address bytes; START/STOP add a little more.

t_SPI = 8 × n_bytes / f_SCLK

R_p,min = (V_DD − V_OL,max) / I_OL and R_p,max = t_r / (0.8473 × C_b)

• I2C pull-up limits (Ω): V_OL,max = 0.4 V, I_OL = sink current (3 mA in standard/fast mode), t_r = maximum rise time (1000 ns standard, 300 ns fast), C_b = bus capacitance (F).

Worked examples

Example 1 (standard). An ATmega at 16 MHz must talk at 9600 baud, 8N1. Find UBRR, the baud error and the time to send 100 bytes.

1. UBRR = 16 × 10⁶ / (16 × 9600) − 1 = 104.17 − 1 = 103.17 → 103.
2. baud_actual = 16 × 10⁶ / (16 × 104) = 9615.4 baud.
3. Error = (9615.4 − 9600) / 9600 × 100 = 0.16 % — acceptable.
4. Bits = 100 × 10 = 1000; t = 1000 / 9600 = 104.2 ms.

Answer: UBRR = 103, error 0.16 %, 104.2 ms for 100 bytes.

Example 2 (GATE level). An MCU reads 6 data bytes from an accelerometer. Over I2C at 400 kHz the sequence is: START, address+W, register address, repeated START, address+R, 6 data bytes, STOP. Over SPI at 8 MHz it is one command byte followed by 6 data bytes. Compare transfer times (ignore the START/STOP bit times). Also find I2C pull-up limits for a 3.3 V bus with C_b = 400 pF in standard mode.

1. I2C bytes = 3 (addr+W, register, addr+R) + 6 = 9 bytes, each 9 clocks → 81 clocks.
2. t_I2C = 81 / 400 × 10³ = 202.5 µs.
3. SPI: 7 bytes × 8 = 56 clocks → t_SPI = 56 / 8 × 10⁶ = 7 µs.
4. Ratio ≈ 202.5 / 7 ≈ 29.
5. R_p,min = (3.3 − 0.4) / 3 × 10⁻³ = 967 Ω.
6. R_p,max = 1000 × 10⁻⁹ / (0.8473 × 400 × 10⁻¹²) = 2.95 kΩ.

Answers: I2C ≈ 202.5 µs, SPI = 7 µs (≈ 29× faster); pull-up between about 0.97 kΩ and 2.95 kΩ (e.g. 2.2 kΩ).

Common mistakes

• Assuming 8 bits per byte on a UART — 8N1 needs 10 bit times.
• Crossing up the wiring: UART TX must go to the other device's RX; SPI MOSI goes to MOSI.
• Ignoring baud error: at 16 MHz, 115 200 baud gives UBRR ≈ 8 with −3.5 % error, which is unreliable — use double-speed mode or a "baud" crystal.
• Mismatched SPI mode (CPOL/CPHA), giving data shifted by one bit.
• Forgetting the I2C pull-ups, or using the 8-bit "address + R/W" byte where a 7-bit address is expected.
• Connecting RS-232 (±12 V) directly to a 3.3 V MCU pin.

For GATE ME

Serial communication appears as concept MCQs (synchronous vs asynchronous, number of wires, full vs half duplex, addressing, START/STOP, start/stop bits, parity) and numericals on bit time, frame time, transfer time and baud-rate register values. Practise counting bits per frame correctly and checking the error of a rounded baud divisor.

Quick check

1. How many bit times does one 8E1 character take?
2. Which bus needs one chip-select line per slave?
3. Why must I2C lines have pull-up resistors?
4. What 8051 TH1 value gives 9600 baud at 11.0592 MHz?
5. What is the bit time at 115 200 baud?

Answers: 1. 11 (start + 8 data + parity + stop) 2. SPI 3. The drivers are open-drain and can only pull low 4. 253 (0xFD) 5. ≈ 8.68 µs