Sequential control and function block programming
Sequential control as state machines, IEC 61131-3 SFC (steps, transitions, branches, action qualifiers) and FBD (functions, function blocks, SR/RS, edge detection), with cylinder-sequence and batch-tank cycle-time examples.
Drafted with Aria, reviewed by the AiCanCode.org team. Spotted an error? Use Give Feedback at the bottom of the page.
Why it matters
Most machines run in steps: clamp, drill, unclamp, eject; fill, heat, mix, drain. Writing such sequences as a tangle of ladder rungs leads to bugs that only show up when a sensor fails mid-cycle. Sequential Function Chart (SFC) and Function Block Diagram (FBD), two IEC 61131-3 languages, give a structured way to design, read and debug sequences and reusable control functions — and they are standard in modern PLC projects.
Key ideas
Combinational vs sequential control. Combinational logic depends only on present inputs (an interlock). Sequential control also depends on where the machine is in its cycle: the same sensor may mean different things in different steps. The machine is a state machine — one state (step) active at a time in a simple sequence, with defined conditions to move between states.
SFC (Sequential Function Chart, derived from GRAFCET).
- Step: a box; the initial step (double box) is active at start-up. Each step has actions attached.
- Transition: a short horizontal bar between steps with a Boolean condition (limit switch, timer done, level reached).
- Evolution rules: a transition fires when all steps immediately before it are active and its condition is true; firing deactivates those steps and activates all steps immediately after it.
- Selective (alternative) branch: single horizontal line; exactly one path is taken (OR), each path starting with its own transition. Conditions should be mutually exclusive.
- Simultaneous (parallel) branch: double horizontal lines; all paths start together (AND) and must all finish before the joining transition can fire.
- Action qualifiers: N (non-stored — on while the step is active), S (set/stored) and R (reset), L (time-limited), D (time-delayed), P (pulse, one scan).
- Each step usually has a step flag and step timer (e.g.
S3.T) available for transition conditions and fault timeouts.
Implementing sequences without SFC.
- Step bits in ladder: each step is a memory bit; the rung for step n is
S_n = (S_(n−1) · T_n + S_n) · S̄_(n+1)— set by the previous step plus its transition, held by its own contact, cleared when the next step becomes active. Outputs are driven from step bits. - Step number (sequencer): an integer variable and a CASE statement in Structured Text, or a drum/sequencer instruction.
- Always add an emergency-stop/reset path back to the initial step, and a timeout on every step to catch a stuck sensor.
FBD (Function Block Diagram).
- Graphical: signals flow from left (inputs) to right (outputs) through blocks connected by lines, much like a logic or signal-flow diagram.
- Functions (AND, OR, ADD, MUL, comparisons, MOVE, SEL) have no memory: same inputs, same output.
- Function blocks (TON, CTU, R_TRIG, SR, RS, PID) have internal state, so every use is a separate instance with its own data.
- Bistables: SR is set-dominant (if S1 and R are both 1, Q1 = 1); RS is reset-dominant (Q1 = 0). Use RS for safety-related latches so a stop always wins.
- Edge detection: R_TRIG / F_TRIG give a one-scan pulse on a rising/falling edge.
- Users can build their own function blocks (e.g. "Valve" or "Motor" with commands, feedback and alarms) and reuse them — the basis of modular PLC software.
- FBD suits continuous and analog control (scaling, PID, comparisons); SFC suits sequences; ladder suits discrete interlocks; projects often mix them.
Pneumatic sequence notation. Cylinders are named A, B, …; "+" = extend, "−" = retract; limit switches a0/a1 sense retracted/extended. The sequence A+ B+ A− B− means: A extends, then B extends when a1 is made, and so on — each limit switch is the transition condition for the next step.
Formulas
T_cycle = Σ t_step
- Cycle time (s): sum of the durations of all steps executed in one cycle (motion times, dwell timers, fill times).
Throughput = 3600 / T_cycle
- Cycles (parts) per hour, with T_cycle in s.
t_fill = A × Δh / Q
- Time (s or min) to change the level of a tank of cross-section A (m²) by Δh (m) at volumetric flow Q (m³/s or m³/min).
S_n = (S_(n−1) · T_n + S_n) · S̄_(n+1)
- Step-bit equation for a single sequence in ladder (T_n = transition condition into step n).
SR: Q = S + R̄ · Q RS: Q = R̄ · (S + Q)
- Set-dominant and reset-dominant bistables.
Worked examples
Example 1 (standard). Two pneumatic cylinders perform A+ B+ (dwell 2 s) A− B−. Each stroke takes 1.5 s. Write the SFC steps with transitions and find the cycle time and output per hour.
- S0 (initial, idle) → transition: Start · a0 · b0.
- S1: A+ → transition a1. S2: B+ → transition b1. S3: dwell (step timer) → transition S3.T ≥ 2 s. S4: A− → transition a0. S5: B− → transition b0 → back to S0 (or S1 for automatic cycling).
T_cycle = 4 × 1.5 + 2 = 8 s.Throughput = 3600 / 8 = 450cycles per hour.
Answer: T_cycle = 8 s, 450 parts/h.
Example 2 (GATE level). A mixing tank of cross-section 2 m² runs: fill liquid A from 0 to 0.6 m at 0.2 m³/min; fill liquid B from 0.6 m to 1.0 m at 0.4 m³/min; mix for 2 min; drain the full 1.0 m at 0.5 m³/min. Find the batch time and the number of complete batches in an 8-hour shift, and name the transition conditions.
- Fill A:
t = A × Δh / Q = 2 × 0.6 / 0.2 = 6 min(transition: level switch L1 at 0.6 m). - Fill B:
t = 2 × 0.4 / 0.4 = 2 min(transition: L2 at 1.0 m). - Mix: 2 min (transition: step timer ≥ 120 s).
- Drain:
t = 2 × 1.0 / 0.5 = 4 min(transition: low-level switch L0). T_cycle = 6 + 2 + 2 + 4 = 14 min.- Batches = 480 min / 14 min = 34.3 → 34 complete batches.
If the agitator may also start during fill B, that is a simultaneous branch: the "fill B" and "agitate" paths start together and both must finish before draining.
Common mistakes
- Allowing two steps of a single sequence to be active at once (missing the reset of the previous step).
- Selective branches with overlapping conditions, so the chart's behaviour depends on evaluation order.
- Forgetting that a simultaneous branch waits for all parallel paths before joining.
- Driving the same output from several steps with N actions without combining them properly.
- No timeout or fault branch — a failed limit switch leaves the machine hanging in a step forever.
- Using a set-dominant bistable for a stop/fault latch.
- Treating a function block like a function: two calls to one TON instance share its timer.
For GATE ME
This topic appears through questions on pneumatic or machine sequences (displacement-step diagrams, ordering of steps), SFC rules (which steps are active after a transition fires), cycle-time calculations and simple FBD/ladder equivalence (SR/RS behaviour, AND/OR blocks). Practise tracing a chart step by step and adding step times consistently.
Quick check
- When does an SFC transition fire?
- What does a double horizontal line in SFC mean?
- In an SR bistable, what is Q1 when S1 = 1 and R = 1?
- A sequence has steps of 3, 5, 2 and 4 s. How many cycles per hour?
- What is the difference between a function and a function block?
Answers: 1. When all preceding steps are active and its condition is true 2. Simultaneous (parallel) branch 3. 1 (set dominant) 4. 3600/14 ≈ 257 cycles 5. A function block has internal memory (instance data); a function does not
Interview questions
All Microcontrollers, PLC and Industrial Automation interview questionsTry answering each one aloud before you open it.
1.What is sequential control in the context of industrial automation?Concept
Sequential control refers to the process of executing a series of operations in a specific order. In industrial automation, it ensures that machines and processes operate in a predefined sequence, often using timers, counters, and logic conditions to transition between steps.
2.Explain the concept of function block programming in PLCs.Concept
Function block programming is a graphical programming language used in PLCs where functions are represented as blocks. These blocks can be interconnected to perform complex control tasks. It allows for modular programming, making it easier to design, debug, and maintain control systems.
3.What happens if a PLC loses power during operation?Application
If a PLC loses power during operation, it will stop executing its control program, and the outputs will typically revert to a safe state, often 'off'. Upon power restoration, the PLC will usually restart and resume its program from the beginning or from a predefined state, depending on its configuration.
4.How does a timer function block work in a PLC program?Concept
A timer function block in a PLC program is used to introduce delays or measure time intervals. It typically has inputs for start, reset, and preset time, and outputs for elapsed time and a done signal. When activated, it counts time until the preset value is reached, then triggers the done output.
5.Explain the role of counters in sequential control systems.Concept
Counters in sequential control systems are used to count events or operations, such as the number of items passing a sensor. They help in executing specific actions after a certain count is reached, enabling precise control over processes like batching or repetitive tasks.
6.Why is it important to have a fail-safe design in PLC systems?Application
A fail-safe design in PLC systems is crucial to ensure that in the event of a failure, the system transitions to a safe state, preventing accidents or damage. This is important for protecting both human operators and equipment, especially in hazardous environments.
7.What is the difference between a latch and an unlatch function in PLC programming?Concept
A latch function in PLC programming is used to maintain an output in an 'on' state even after the initiating condition is removed. An unlatch function is used to turn the output 'off'. These functions are useful for maintaining states across different program cycles.
8.A PLC timer is set to 5 s and the scan time is 10 ms. What delay does it actually produce?Numerical
About 5 s, but not exactly: the timer is updated and its done bit acted on only when its rung is scanned, so the output can change up to roughly one scan (here ~10 ms) late, plus another scan before the physical output is written, and the delay is also quantised by the timer's time base. So the real delay is 5 s plus up to a few tens of milliseconds — negligible here, but significant for short presets or long scans.
9.A PLC counter is set to count up to 100. If the input pulse frequency is 2 Hz, how long will it take for the counter to reach its preset value?Numerical
The counter will reach its preset value of 100 after 50 seconds. This is calculated by dividing the preset value (100) by the pulse frequency (2 Hz), resulting in 100 / 2 = 50 seconds.
Finished this topic? Mark it so your progress, study plan and readiness keep up.
Stuck on something here?