Sinusoidal steady state, phasors and impedance
Sinusoids, phasors, impedance and admittance, phase relations and phasor-domain circuit analysis.
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Why it matters
Mains-powered instruments, AC bridges, LVDT excitation, carrier amplifiers and filters all run in sinusoidal steady state. Phasors turn the differential equations of R, L and C into complex algebra. All the DC tools (KCL, KVL, nodal, mesh, Thevenin, star–delta) then work unchanged with impedances in place of resistances. This is the foundation for power, resonance, three-phase and two-port analysis.
Key ideas
Sinusoids. A sinusoid is written v(t) = Vm·cos(ωt + φ), where Vm is the peak (amplitude), ω = 2πf is the angular frequency in rad/s, and φ is the phase. The RMS value of a sinusoid is Vm/√2. Convert sine to cosine before comparing phases: sin θ = cos(θ − 90°).
Phasors. In a linear circuit driven at a single frequency, every voltage and current, once transients have died out, is a sinusoid at that frequency. Only amplitude and phase differ. The phasor V = Vm∠φ = Vm·e^(jφ) carries that information, and v(t) = Re{V·e^(jωt)}.
- Differentiation becomes multiplication by jω; integration becomes division by jω.
- Phasors may be written with peak or RMS magnitudes. Be consistent; power formulas assume RMS.
Impedance and admittance.
Z = V/I = R + jX(Ω). R is the resistance; X is the reactance (positive for inductive, negative for capacitive).Y = 1/Z = G + jB(S). G is the conductance; B is the susceptance.- Element impedances:
Z_R = R,Z_L = jωL,Z_C = 1/(jωC) = −j/(ωC). - Note that G ≠ 1/R unless X = 0:
G = R/(R² + X²)andB = −X/(R² + X²).
Phase relations.
- In a resistor, v and i are in phase.
- In an inductor, the current lags the voltage by 90°.
- In a capacitor, the current leads the voltage by 90°.
A circuit is called inductive (lagging) or capacitive (leading) according to the sign of the net X.
Frequency behaviour. XL = ωL rises with frequency: an inductor is a short at DC and an open at very high frequency. XC = 1/(ωC) falls with frequency: a capacitor is an open at DC and a short at high frequency. This is the basis of all passive filters.
Analysis. Impedances combine like resistances: in series they add, and in parallel Z1·Z2/(Z1 + Z2). Voltage and current dividers, source transformation, Thevenin/Norton, superposition, nodal and mesh analysis all apply with complex numbers. KVL and KCL hold for phasors, not for RMS magnitudes.
Different frequencies. If sources have different frequencies, solve each separately with its own impedances and add the time-domain results. Phasors of different frequencies must never be added.
Phasor diagrams. Drawing the phasors to scale shows the geometry. For example, in a series RL the voltages VR and VL are perpendicular, and the source voltage is their hypotenuse.
Formulas
v(t) = Vm·cos(ωt + φ)↔V = Vm∠φ;V_rms = Vm/√2.ω = 2πf(rad/s, with f in Hz).Z_L = jωL,Z_C = −j/(ωC)(Ω, with L in H and C in F).Z = R + jX,|Z| = √(R² + X²),θ = tan⁻¹(X/R).Y = 1/Z = G + jB,G = R/(R² + X²),B = −X/(R² + X²)(S).- Series:
Z = Z1 + Z2. Parallel:Z = Z1·Z2/(Z1 + Z2). - Divider:
V2 = V·Z2/(Z1 + Z2).
Worked examples
Example 1 (standard): series RL on the mains. Given: 230 V RMS, 50 Hz, R = 30 Ω, L = 0.1273 H. Find the current and the voltages across R and L.
XL = 2π × 50 × 0.1273 = 40.0 Ω.Z = 30 + j40 = 50∠53.13° Ω.I = 230∠0°/50∠53.13° = 4.6∠−53.13° A(RMS). The current lags the voltage by 53.13°.VR = 4.6 × 30 = 138 VandVL = 4.6 × 40 = 184 V.- Check:
√(138² + 184²) = 230 V✓. The arithmetic sum, 322 V, is meaningless.
Answer: I = 4.6 A lagging by 53.1°; VR = 138 V, VL = 184 V.
Example 2 (GATE level): series–parallel network by phasors.
Given: vs(t) = 10·cos(1000t) V drives R1 = 4 Ω in series with a parallel combination of R2 = 4 Ω and C = 250 µF. Find the capacitor voltage vC(t).
XC = 1/(1000 × 250×10⁻⁶) = 4 Ω, soZ_C = −j4 Ω.- Parallel combination:
Zp = 4·(−j4)/(4 − j4) = 2 − j2 Ω. - Total impedance:
Z = 4 + 2 − j2 = 6 − j2 Ω. - Current:
I = 10∠0°/(6 − j2) = 1.581∠18.43° A(peak). - Capacitor voltage:
VC = I·Zp = 1.581∠18.43° × 2.828∠−45° = 4.472∠−26.57° V. - Back to the time domain:
vC(t) = 4.47·cos(1000t − 26.57°)V.
Answer: vC(t) = 4.47·cos(1000t − 26.6°) V.
Common mistakes
- Adding RMS magnitudes around a loop instead of phasors.
- Mixing sine and cosine references, or degrees and radians, inside one problem.
- Writing
Z_C = jωCorZ_C = 1/(ωC)without the −j. - Taking G = 1/R for a series R–X branch.
- Using peak phasors and then applying RMS power formulas without the factor ½.
- Adding phasors of different frequencies.
- Applying phasors during a transient. They describe steady state only.
For GATE IN
Expect: impedance or admittance of a network at a given ω; magnitude and phase of a current or voltage (NAT); phase relationships (lead or lag) from a phasor diagram; voltmeter readings across individual elements that do not add arithmetically; response to a sum of sinusoids at different frequencies by superposition. Practise fast polar–rectangular conversion and checking results with a phasor diagram.
Quick check
- What is the impedance of a 10 µF capacitor at 1 kHz?
- In a series RL circuit, VR = 60 V and VL = 80 V. What is the source voltage?
- Does current lead or lag the voltage in a capacitor?
- What is the RMS value of 325·cos(314t) V?
Answers: 1. −j15.9 Ω. 2. 100 V. 3. It leads by 90°. 4. 229.8 V.
Interview questions
All Electrical Circuits interview questionsTry answering each one aloud before you open it.
1.What is a phasor, and when can you use phasor analysis?Concept
A phasor is a complex number Vm∠φ that represents the amplitude and phase of a sinusoid at a known frequency: v(t) = Re{V·e^(jωt)}. It is valid only for linear circuits in sinusoidal steady state, with all sources at the same frequency, after transients have decayed. It turns differential equations into algebra, since d/dt becomes jω. For sources at different frequencies, you solve each frequency separately and add in the time domain.
2.Define impedance and admittance and their components.Concept
Impedance Z = V/I = R + jX in ohms, where R is the resistance and X the reactance (ωL for an inductor, −1/(ωC) for a capacitor). Admittance Y = 1/Z = G + jB in siemens, with conductance G and susceptance B. For a series R–X branch, G = R/(R² + X²), not 1/R. Impedances add in series and admittances add in parallel.
3.Why does current lag voltage in an inductor and lead it in a capacitor?Concept
In an inductor v = L·di/dt. The voltage is largest when the current is changing fastest, at its zero crossings, so the voltage peaks a quarter cycle before the current: the current lags by 90°. In a capacitor i = C·dv/dt, so the current peaks when the voltage is changing fastest, and the current leads by 90°. In phasor form, Z_L = jωL and Z_C = −j/(ωC).
4.In a series RL circuit a voltmeter reads 60 V across R and 80 V across L. Why is the supply voltage not 140 V?Concept
KVL holds for instantaneous values and for phasors, not for RMS magnitudes. VR is in phase with the current while VL leads it by 90°, so the two phasors are perpendicular. The supply voltage is their phasor sum: √(60² + 80²) = 100 V, leading the current by tan⁻¹(80/60) = 53.1°. Adding meter readings arithmetically is a classic error.
5.What is the impedance of a 10 µF capacitor at 1 kHz, and how does it change at 10 kHz?Concept
Z_C = −j/(2πfC) = −j/(2π × 1000 × 10×10⁻⁶) = −j15.9 Ω. At 10 kHz it is ten times smaller, −j1.59 Ω, because capacitive reactance is inversely proportional to frequency. This is why capacitors pass high frequencies and block DC in coupling and filter circuits.
6.How would you analyse a circuit driven by a DC source and an AC source together?Concept
Use superposition. Solve the DC case with inductors shorted and capacitors opened. Solve the AC case with phasors and impedances at the AC frequency, with the DC source deactivated. Then add the two results as time functions, for example i(t) = I_DC + Im·cos(ωt + φ). The RMS value of the total is √(I_DC² + I_ac,rms²), and powers at different frequencies add.
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