Circuit elements, Kirchhoff's laws and source transformation

Why it matters

Every sensor interface, bridge circuit and signal-conditioning stage an instrumentation engineer designs is, at bottom, a network of sources and passive elements. Kirchhoff's laws and the element equations are the only tools you truly need to analyse any lumped circuit; every later method (mesh, nodal, Thevenin, Laplace) is an organised way of applying them. Source transformation is the quickest hand technique for collapsing a ladder of sources and resistors into one equivalent.

Key ideas

Lumped elements. Network analysis assumes the circuit is small compared with the wavelength of the signals, so each element can be described only by the voltage across it and the current through it.

• Resistor: v = R·i. Dissipates power p = i²R = v²/R (always absorbs).
• Inductor: v = L·di/dt. Stores energy in its magnetic field. Its current cannot change instantly (that would need infinite voltage). In DC steady state it acts as a short circuit.
• Capacitor: i = C·dv/dt. Stores energy in its electric field. Its voltage cannot change instantly. In DC steady state it acts as an open circuit.
• Independent sources: an ideal voltage source fixes the voltage across it whatever current flows; an ideal current source fixes the current through it whatever voltage appears across it.
• Dependent (controlled) sources: VCVS, VCCS, CCVS and CCCS, whose value is set by a voltage or current elsewhere in the circuit. They model transistors and op-amps.

Passive sign convention. If the current enters the element's + terminal, the product p = v·i is the power absorbed. A negative result means the element is actually delivering power. Use one convention throughout a problem.

Topology words. A node is a point where two or more elements join; a branch is a single element; a loop is any closed path; a mesh is a loop that contains no other loop (planar circuits only). For a connected network with b branches and n nodes there are n − 1 independent KCL equations and b − n + 1 independent KVL equations.

Kirchhoff's Current Law (KCL). The algebraic sum of currents leaving any node (or any closed surface) is zero. It follows from conservation of charge: a node cannot store charge.

Kirchhoff's Voltage Law (KVL). The algebraic sum of voltages around any closed path is zero. It follows from conservation of energy (the electric field in a lumped circuit is conservative).

Both laws hold for any element (linear or nonlinear, time-varying or not) and for instantaneous values. In AC steady state they hold for phasors too.

Series and parallel. Elements in series carry the same current; resistances add. Elements in parallel share the same voltage; conductances add. Two resistors in parallel give R1·R2/(R1 + R2).

Voltage and current division. In a series string, the voltage divides in proportion to resistance. In a parallel pair, the current divides in inverse proportion to resistance: the smaller resistor takes the larger share.

Source transformation. A practical voltage source (Vs in series with R) and a practical current source (Is in parallel with the same R) are equivalent at their terminals when Is = Vs/R. Both give the same open-circuit voltage Vs and the same short-circuit current Is. The equivalence is only external. The power dissipated inside the source resistor is not the same in the two models. The arrow of the current source points toward the terminal that was the + terminal of the voltage source. An ideal source (R = 0 for a voltage source, R = ∞ for a current source) cannot be transformed.

Forbidden connections. Ideal voltage sources of different values in parallel, or ideal current sources of different values in series, violate KVL or KCL and have no solution. A voltage source in parallel with any element (including a current source) is fine: the terminal voltage is still set by the voltage source. Likewise, any element in series with an ideal current source does not change the current in that branch.

Formulas

• v = R·i, v = L·di/dt, i = C·dv/dt, where v is in V, i in A, R in Ω, L in H, C in F, t in s.
• Σ i_leaving = 0 at any node (KCL).
• Σ v = 0 around any closed loop (KVL).
• R_series = R1 + R2 + …, 1/R_parallel = 1/R1 + 1/R2 + …
• Voltage divider: v1 = V·R1/(R1 + R2)
• Current divider: i1 = I·R2/(R1 + R2)
• Source transformation: Is = Vs/R, Vs = Is·R, with the same R in both.
• Power absorbed (passive sign convention): p = v·i in W.
• Stored energy: w_L = ½·L·i², w_C = ½·C·v², in J.

Worked examples

Example 1 (standard): reducing a circuit by source transformation. Given: a 24 V source in series with 4 Ω, connected between node a and ground. Between the same two nodes are a 3 A current source (pointing into node a), a 12 Ω resistor and a 6 Ω load. Find the load current.

1. Transform 24 V + 4 Ω into a current source: Is = 24/4 = 6 A into node a, in parallel with 4 Ω.
2. The two current sources are in parallel and both point into node a, so they add: 6 + 3 = 9 A.
3. The 4 Ω and 12 Ω resistors are in parallel: 4·12/(4 + 12) = 3 Ω.
4. Transform 9 A ∥ 3 Ω back into a voltage source: 9·3 = 27 V in series with 3 Ω.
5. The load current is I = 27/(3 + 6) = 3 A.
6. Check by KCL at node a: (V − 24)/4 + V/12 + V/6 = 3. This gives 0.5·V = 9, so V = 18 V and I = 18/6 = 3 A. ✓

Answer: I_load = 3 A.

Example 2 (GATE level): a single loop with a dependent source. Given: one loop contains a 20 V source, 2 Ω, 3 Ω and a current-controlled voltage source of 4·I volts, where I is the loop current. The dependent source's polarity opposes the current (I enters its + terminal). Find I and the power absorbed by each element.

1. KVL around the loop: 20 − 2I − 3I − 4I = 0.
2. So I = 20/9 = 2.222 A.
3. The 20 V source delivers 20 × 2.222 = 44.44 W.
4. The resistors absorb (2 + 3) × 2.222² = 24.69 W.
5. The dependent source absorbs 4I·I = 4 × 2.222² = 19.75 W.
6. Power balance: 24.69 + 19.75 = 44.44 W. ✓

Answer: I = 2.22 A; the dependent source absorbs 19.75 W.

Treat the dependent source as an ordinary source when writing KVL. Then add one constraint equation that ties its control variable to the circuit unknowns.

Common mistakes

• Mixing sign conventions: writing some drops as positive and others as negative without a consistent rule. Choose "sum of drops in the loop direction = sum of rises" and stick to it.
• Pointing the transformed current source the wrong way. It must push current out of the terminal that was + on the voltage source.
• Changing the resistor value during a source transformation. The same R appears in both forms.
• Transforming a source whose series resistor is also the element whose current or voltage you need. After the transformation that element no longer carries the original current.
• Calling a voltage source in parallel with a current source "invalid". It is valid; only conflicting ideal sources are.
• Deactivating a dependent source when finding equivalent resistance. Only independent sources are set to zero.

For GATE IN

Typical questions give a small resistive network, often with a dependent source, and ask for one current, voltage or power. These are frequently NAT questions. Practise reducing ladders by alternating source transformation with series–parallel combination, writing KCL at a supernode, and checking answers with a power balance. Conceptual MCQs test DC steady-state behaviour of L and C, and which source connections are allowed.

Quick check

1. A 5 A source in parallel with 4 Ω is transformed. What is the equivalent voltage source?
2. In DC steady state, what does a capacitor look like?
3. A network has 6 branches and 4 nodes. How many independent KVL equations are there?
4. Is an ideal 10 V source in parallel with an ideal 2 A current source a valid circuit?

Answers: 1. 20 V in series with 4 Ω. 2. An open circuit. 3. 6 − 4 + 1 = 3. 4. Yes; the terminal voltage is 10 V.