MOSFET biasing and small-signal model

Why it matters

MOSFETs are the transistors inside almost every op-amp, ADC front end and microcontroller you will use in instrumentation, and discrete MOSFETs drive heaters, valves and motors. Their near-infinite DC gate resistance makes them ideal input devices for high-impedance sensors such as pH electrodes and piezo transducers. As with the BJT, you first fix a stable DC operating point and then replace the device by a linear small-signal model.

Key ideas

Structure and threshold. In an n-channel enhancement MOSFET no channel exists at V_GS = 0. When V_GS exceeds the threshold voltage V_t, an inversion layer of electrons forms under the gate and links source and drain. The gate is insulated by oxide, so the DC gate current is essentially zero. Depletion-type MOSFETs have a built-in channel (negative V_t for n-channel); p-channel devices work the same way with all polarities reversed.

Regions of operation (n-channel). Define the overdrive V_ov = V_GS − V_t.

• Cut-off: V_GS < V_t, I_D ≈ 0.
• Triode (linear): V_GS > V_t and V_DS < V_ov. The channel behaves like a voltage-controlled resistor; used for switches and analogue multiplexers.
• Saturation (pinch-off): V_GS > V_t and V_DS ≥ V_ov. I_D depends on V_GS but only weakly on V_DS, so the device is a voltage-controlled current source. This is the amplifying region. (Note the naming clash: MOSFET "saturation" corresponds to the BJT active region.)

Square law. In saturation I_D = ½·μ_n·C_ox·(W/L)·V_ov². Many textbooks write k_n = ½·μ_n·C_ox·(W/L) so that I_D = k_n·V_ov². Read each question carefully to see which convention its "k" uses.

Channel-length modulation. As V_DS rises the pinch-off point moves towards the source, shortening the effective channel, so I_D rises slightly. This is modelled by the factor (1 + λ·V_DS) and gives a finite output resistance r_o = 1/(λ·I_D).

Biasing. Because V_t and k_n vary between devices and with temperature, fixing V_GS directly gives a poorly controlled I_D. The standard discrete scheme sets the gate voltage with a divider (no gate current, so the divider is exact) and adds a source resistor R_S. The equation V_GS = V_G − I_D·R_S, combined with the square law, gives a quadratic; keep the root with V_GS > V_t. R_S provides negative feedback: if I_D rises, V_GS falls. Always check V_DS ≥ V_ov afterwards.

Small-signal model. Gate open circuit (r_in = ∞ at low frequency), current source g_m·v_gs from drain to source, and r_o in parallel. Unlike the BJT there is no r_π. At high frequency C_gs and C_gd are added. If the body is not tied to the source, a second source g_mb·v_bs models the body effect.

Temperature. Mobility falls and V_t falls as temperature rises. At normal bias currents the mobility effect wins, so I_D falls with temperature, which is why MOSFETs do not suffer thermal runaway and can be paralleled more easily than BJTs.

Formulas

I_D = k_n·(V_GS − V_t)²·(1 + λ·V_DS) with k_n = ½·μ_n·C_ox·(W/L) — saturation; k_n in A/V², λ in V⁻¹.

I_D = 2k_n·[(V_GS − V_t)·V_DS − V_DS²/2] — triode region.

V_DS ≥ V_GS − V_t — condition for saturation.

g_m = 2·I_D / V_ov = 2·k_n·V_ov = 2·√(k_n·I_D) — transconductance (S).

r_o = 1 / (λ·I_D) — output resistance (Ω).

A_v = −g_m·(R_D ∥ R_L ∥ r_o) — common-source gain, source bypassed.

A_v = −g_m·R_D / (1 + g_m·R_S) — common-source gain with unbypassed R_S (r_o neglected).

Worked examples

Example 1 (standard: bias). An n-channel enhancement MOSFET has V_t = 1 V and k_n = 1 mA/V² (I_D = k_n·V_ov²). A divider sets V_G = 4 V, R_S = 1 kΩ, R_D = 3 kΩ, V_DD = 12 V. Find I_D, V_GS and V_DS.

1. Gate current is zero, so V_GS = V_G − I_D·R_S = 4 − I_D (I_D in mA, R_S in kΩ).
2. Saturation: I_D = k_n·(V_GS − 1)². Let x = V_GS − 1; then I_D = x² and x = 3 − x².
3. Solve x² + x − 3 = 0: x = (−1 + √13)/2 = 1.303 V (the negative root gives V_GS < V_t and is rejected).
4. I_D = 1.303² = 1.697 mA; V_GS = 2.303 V.
5. V_DS = V_DD − I_D·(R_D + R_S) = 12 − 1.697 × 4 = 5.21 V. Since 5.21 V > V_ov = 1.30 V, the device is in saturation.

Answer: I_D ≈ 1.70 mA, V_GS ≈ 2.30 V, V_DS ≈ 5.21 V.

Example 2 (GATE level: small signal). For Example 1 take λ = 0.02 V⁻¹ (ignore its effect on bias). Find g_m, r_o and the voltage gain with no load, (a) with R_S bypassed and (b) with R_S unbypassed.

1. g_m = 2I_D/V_ov = 2 × 1.697 mA / 1.303 V = 2.61 mS.
2. r_o = 1/(λI_D) = 1/(0.02 × 1.697×10⁻³) = 29.5 kΩ.
3. (a) A_v = −g_m(R_D ∥ r_o): 3 kΩ ∥ 29.5 kΩ = 2.72 kΩ, so A_v = −2.61 mS × 2.72 kΩ = −7.09.
4. (b) A_v = −g_m·R_D/(1 + g_m·R_S) = −(2.61 × 3)/(1 + 2.61 × 1) = −7.82/3.61 = −2.17.

Answer: g_m ≈ 2.6 mS, r_o ≈ 29.5 kΩ, A_v ≈ −7.1 (bypassed) and ≈ −2.2 (unbypassed). MOSFET stages give less gain than BJT stages at the same current, because g_m = 2I_D/V_ov is much smaller than I_C/V_T.

Common mistakes

• Mixing the two conventions for k (with and without the ½) and getting I_D wrong by a factor of 2.
• Keeping the wrong root of the bias quadratic; always reject the root with V_GS < V_t.
• Forgetting to check V_DS ≥ V_GS − V_t after solving.
• Calling the MOSFET saturation region "saturation" in the BJT sense (switch fully ON); for a MOSFET the fully-ON switch is the triode region.
• Using g_m = I_D/V_T (BJT formula) for a MOSFET in strong inversion.
• Ignoring the body effect when the source is not tied to the body (for example, in a source follower in an IC).

For GATE IN

Expect region identification from terminal voltages, bias-point calculations that lead to a quadratic, g_m and r_o from given k_n and λ, and common-source gain with and without source degeneration. Also expect conceptual questions on enhancement versus depletion devices, channel-length modulation and why MOSFET current falls with temperature. Practise solving the bias quadratic quickly and checking the region.

Quick check

1. V_t = 0.5 V, V_GS = 1.5 V, V_DS = 0.6 V. Which region?
2. I_D = 1 mA at V_ov = 0.25 V. What is g_m?
3. With λ = 0.01 V⁻¹ and I_D = 2 mA, what is r_o?
4. Why is a MOSFET's DC input resistance so high?

Answers: 1. Triode (V_DS < V_ov = 1 V). 2. 8 mS. 3. 50 kΩ. 4. The gate is insulated from the channel by oxide, so no DC gate current flows.