BJT biasing and small-signal model
BJT regions, bias stability and voltage-divider bias, then the hybrid-π small-signal model with g_m, r_π, r_o and CE gain.
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Why it matters
A transistor amplifies only if its DC operating point (the Q-point) sits in the active region and stays there when temperature and β change. Once the Q-point is fixed, the small-signal model (g_m, r_π, r_o) turns the transistor into a linear circuit you can analyse with ordinary network theory. Every amplifier calculation in the rest of this subject uses these two steps: DC bias first, then AC small-signal analysis.
Key ideas
Regions of operation (npn).
- Active: base-emitter junction forward biased, collector-base junction reverse biased. I_C = β·I_B. Used for amplification.
- Saturation: both junctions forward biased, V_CE ≈ 0.2 V. Used as an ON switch.
- Cut-off: both junctions reverse biased, I_C ≈ 0. Used as an OFF switch.
Why bias stability matters. β varies by a factor of two or more between devices of the same type and rises with temperature; V_BE falls by about 2 mV/°C; the leakage I_CBO doubles about every 10 °C. A bias circuit that sets I_B directly (fixed bias) passes every change in β straight to I_C. Circuits with negative feedback (collector-to-base bias, emitter resistor, voltage-divider bias) make I_C depend mainly on resistor values.
Voltage-divider (self) bias. R1 and R2 set the base voltage; the emitter resistor R_E sets the emitter current, roughly I_E ≈ (V_B − V_BE)/R_E. Replace the divider by its Thevenin equivalent for an exact answer. The bias is stable when (β + 1)·R_E ≫ R_Th, i.e. the divider is "stiff". R_E gives DC negative feedback: if I_C rises, V_E rises, V_BE falls and I_C is pulled back.
Stability factor. S = ∂I_C/∂I_CBO measures sensitivity to leakage. For fixed bias S = β + 1 (poor); for voltage-divider bias S = (β + 1)(1 + R_Th/R_E)/(β + 1 + R_Th/R_E), which approaches 1 when R_Th/R_E is small.
The hybrid-π small-signal model. For signals small compared with V_T (≈ 26 mV), the transistor is replaced by:
- r_π between base and emitter (the input resistance looking into the base),
- a controlled current source g_m·v_be from collector to emitter,
- r_o from collector to emitter (Early effect). DC sources are set to zero (DC voltage sources shorted, DC current sources opened) and coupling and bypass capacitors are treated as shorts at mid-band. The h-parameter model (h_ie ≈ r_π, h_fe ≈ β, 1/h_oe ≈ r_o, h_re ≈ 0) is the same model in different notation.
Early effect. Increasing V_CE widens the collector-base depletion region, narrows the effective base and raises I_C slightly. The output characteristics, extended backwards, meet at −V_A (the Early voltage), giving a finite output resistance r_o = V_A/I_C.
Formulas
I_C = β·I_B, I_E = (β + 1)·I_B, α = β/(β + 1) — active region; currents in A.
V_Th = V_CC·R2/(R1 + R2), R_Th = R1∥R2 — Thevenin equivalent of the bias divider (V, Ω).
I_B = (V_Th − V_BE) / (R_Th + (β + 1)·R_E) — voltage-divider bias; V_BE ≈ 0.7 V for silicon.
V_CE = V_CC − I_C·R_C − I_E·R_E — check V_CE > V_CE(sat) ≈ 0.2 V to confirm the active region.
g_m = I_C / V_T — transconductance (S); V_T = kT/q ≈ 26 mV at room temperature.
r_π = β / g_m = V_T / I_B — small-signal input resistance at the base (Ω).
r_o = V_A / I_C — output resistance (Ω); V_A Early voltage (V).
A_v = −g_m·(R_C ∥ R_L ∥ r_o) — CE gain with R_E bypassed.
A_v ≈ −β·(R_C ∥ R_L) / (r_π + (β + 1)·R_E) — CE gain with an unbypassed R_E (r_o neglected).
Worked examples
Example 1 (standard: bias). V_CC = 12 V, R1 = 40 kΩ, R2 = 10 kΩ, R_C = 2 kΩ, R_E = 1 kΩ, β = 100, V_BE = 0.7 V. Find I_C and V_CE.
V_Th = V_CC·R2/(R1 + R2)= 12 × 10/50 = 2.4 V.R_Th = R1∥R2= 40 × 10/50 = 8 kΩ.I_B = (V_Th − V_BE)/(R_Th + (β + 1)R_E)= (2.4 − 0.7)/(8 kΩ + 101 kΩ) = 1.7/109 000 = 15.6 µA.I_C = β·I_B= 1.56 mA;I_E = 101 × 15.6 µA= 1.575 mA.V_CE = V_CC − I_C·R_C − I_E·R_E= 12 − 3.12 − 1.575 = 7.31 V. Since V_CE > 0.2 V, the transistor is active.
Answer: I_C ≈ 1.56 mA, V_CE ≈ 7.3 V. (The quick estimate I_E ≈ (2.4 − 0.7)/1 kΩ = 1.7 mA is within 10 %.)
Example 2 (GATE level: small signal). For the bias of Example 1, V_T = 26 mV and V_A = 100 V. A 2 kΩ load is capacitively coupled to the collector. Find g_m, r_π, r_o and the voltage gain (a) with R_E fully bypassed and (b) with R_E unbypassed.
g_m = I_C/V_T= 1.56 mA/26 mV = 60 mS.r_π = β/g_m= 100/0.060 = 1.67 kΩ.r_o = V_A/I_C= 100/1.56 mA = 64.1 kΩ.- (a)
A_v = −g_m(R_C∥R_L∥r_o): R_C∥R_L = 1 kΩ, and 1 kΩ ∥ 64.1 kΩ = 0.985 kΩ, so A_v = −0.060 × 985 = −59.1. - (b)
A_v ≈ −β(R_C∥R_L)/(r_π + (β + 1)R_E)= −100 × 1000/(1667 + 101 000) = −0.974, close to the familiar −(R_C∥R_L)/R_E = −1.
Answer: g_m = 60 mS, r_π = 1.67 kΩ, r_o = 64.1 kΩ; A_v ≈ −59 (bypassed) and ≈ −0.97 (unbypassed). The bypass capacitor buys a sixty-fold gain; the unbypassed R_E buys gain that hardly depends on β.
Common mistakes
- Forgetting the (β + 1) factor when an emitter resistor is reflected into the base circuit.
- Ignoring the divider's Thevenin resistance and simply taking V_B = V_CC·R2/(R1 + R2) when the divider is not stiff.
- Not checking V_CE after finding I_C; if V_CE comes out below 0.2 V the transistor is saturated and I_C = β·I_B is invalid.
- Using V_T = 26 mV at temperatures far from 300 K.
- Including R_E in the AC gain when it is bypassed, or leaving it out when it is not.
- Writing r_π = V_T/I_C (that is 1/g_m, smaller by a factor β).
For GATE IN
Expect Q-point calculations (fixed, collector-feedback and voltage-divider bias), region identification from given voltages, and small-signal numericals: g_m, r_π, r_o, gain with and without emitter bypass. Sensitivity questions (how does I_C change when β doubles?) are common. Practise drawing the small-signal circuit quickly and cleanly.
Quick check
- What is g_m at I_C = 1 mA and V_T = 25 mV?
- With β = 200 and g_m = 40 mS, what is r_π?
- Which junction is reverse biased in the active region?
- A transistor has V_A = 50 V and I_C = 0.5 mA. What is r_o?
Answers: 1. 40 mS. 2. 5 kΩ. 3. The collector-base junction. 4. 100 kΩ.
Interview questions
All Analog Electronics interview questionsTry answering each one aloud before you open it.
1.What is BJT biasing and why is it important in analog electronics?Concept
BJT biasing refers to the process of setting a transistor's operating point by applying external voltages or currents. It is crucial because it ensures the transistor operates in the desired region (active, cutoff, or saturation) for amplification or switching applications. Proper biasing stabilizes the transistor's operation against variations in temperature and transistor parameters.
2.Explain the small-signal model of a BJT.Concept
For signals much smaller than V_T (about 26 mV), the BJT is linearised about its Q-point. The hybrid-π model has an input resistance r_π = β/g_m between base and emitter, a voltage-controlled current source g_m·v_be from collector to emitter with g_m = I_C/V_T, and an output resistance r_o = V_A/I_C from the Early effect. DC sources are zeroed and coupling capacitors shorted, so gain and impedances follow from ordinary circuit analysis. At high frequency C_π and C_μ are added.
3.Why is the common-emitter configuration widely used in amplifier circuits?Application
The common-emitter stage is the only single-BJT configuration that gives both substantial voltage gain (−g_m·R_C, typically tens to hundreds) and current gain (about β), so it has the highest power gain. Its input resistance (r_π, a few kΩ) and output resistance (about R_C) are moderate, which suits it as the main gain stage. The output is inverted (180° phase shift), and an emitter resistor can trade gain for stability and linearity.
4.What happens if a BJT is not properly biased?Application
If a BJT is not properly biased, it may not operate in the desired region, leading to distortion or inefficient amplification. For instance, if biased in the cutoff region, the transistor will not conduct, while in saturation, it may not amplify signals effectively. Proper biasing ensures linear operation and stability.
5.How does temperature affect BJT biasing?Application
Three parameters drift with temperature: V_BE falls by about 2 mV/°C, the leakage I_CBO roughly doubles every 10 °C, and β increases. All three push the collector current up, which moves the Q-point towards saturation and, in power stages, can cause thermal runaway. Bias circuits with negative feedback, chiefly an emitter resistor with a stiff divider, make I_C depend mainly on resistor values; diode compensation can cancel the V_BE drift.
6.Explain the role of a bypass capacitor in a BJT amplifier circuit.Application
A bypass capacitor is used in a BJT amplifier circuit to increase the AC gain by providing a low impedance path for AC signals, bypassing the emitter resistor. This prevents the emitter resistor from reducing the AC gain while maintaining DC stability. It effectively decouples AC and DC components.
7.What is the significance of the Early effect in BJTs?Concept
The Early effect refers to the variation in the width of the base-collector depletion region with changes in collector voltage, affecting the collector current. It results in a non-zero output conductance and reduces the output impedance of the transistor. This effect is significant in high-gain applications and must be considered in precise analog designs.
8.Calculate the transconductance (gm) of a BJT with a collector current (Ic) of 2 mA at room temperature.Numerical
The transconductance (gm) can be calculated using the formula gm = Ic / Vt, where Vt is the thermal voltage (approximately 26 mV at room temperature). Thus, gm = 2 mA / 26 mV = 0.077 S (Siemens).
9.Determine the voltage gain of a common-emitter amplifier with R_C = 1 kΩ and g_m = 50 mS (emitter bypassed, no load, r_o neglected).Numerical
With the emitter bypassed, the mid-band gain is A_v = −g_m·(R_C ∥ R_L ∥ r_o). With no load and r_o much larger than R_C, A_v ≈ −g_m·R_C = −0.050 × 1000 = −50. The minus sign is the 180° phase inversion of the CE stage; any load or finite r_o would reduce the magnitude.
10.Why is emitter degeneration used in BJT amplifiers?Application
Emitter degeneration involves adding a resistor in series with the emitter to stabilize the amplifier's gain and improve linearity. It increases the input impedance and reduces the gain sensitivity to variations in transistor parameters. This technique also enhances the amplifier's bandwidth and reduces distortion.
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