Number Systems & Arithmetic

Why Different Number Systems?

Binary (base 2):    Computers — 0 and 1 (transistors on/off)
Octal (base 8):     Compact binary representation (1 octal digit = 3 bits)
Hexadecimal (base 16): Even more compact (1 hex digit = 4 bits) — used in memory addresses, colour codes
BCD:                One decimal digit per 4 bits — used in calculators, displays

Converting Between Bases

Binary → Decimal: sum positional values
  1011₂ = 1×8 + 0×4 + 1×2 + 1×1 = 11₁₀

Decimal → Binary: repeated division by 2, read remainders bottom-to-top
  25 ÷ 2 = 12 R 1
  12 ÷ 2 =  6 R 0
   6 ÷ 2 =  3 R 0
   3 ÷ 2 =  1 R 1
   1 ÷ 2 =  0 R 1
  25₁₀ = 11001₂

Binary → Hex: group 4 bits from right
  1101 0110₂ = D6₁₆  (1101=D, 0110=6)

Hex → Binary: expand each hex digit to 4 bits
  3F₁₆ = 0011 1111₂

Signed Numbers — 2s Complement

Why 2s complement? It is the standard for signed integers in computers because addition works the same way for positive and negative numbers — no special hardware needed!

For n-bit 2s complement:
  Range: -2^(n-1) to +2^(n-1) - 1
  4-bit: -8 to +7

To negate (find 2s complement):
  Method 1: Flip all bits, then add 1
  Method 2: Copy bits from right up to and including first 1; flip everything to the left

Example (4-bit): represent -5
  +5 = 0101
  Flip: 1010
  Add 1: 1011
  So -5 = 1011₂ in 2s complement

Verification: 1011 → 1×(-8) + 0×4 + 1×2 + 1×1 = -8+2+1 = -5 ✓

2s complement arithmetic:

Addition: just add the binary numbers. Overflow detection:
  Overflow iff: carry_into_sign_bit ≠ carry_out_of_sign_bit
  Equivalently: two positives → negative result, or two negatives → positive result

Example: 0110 (+6) + 0111 (+7) = 1101 (-3) ← OVERFLOW! (two positives → negative)
  Cin₃=1, Cout=0 → 1≠0 → overflow confirmed

0110 (+6) + 0010 (+2):
  Result = 1000 (-8 in 2s complement) ← WRONG!
  Cin₃=1, Cout=0 → overflow

But: 0100 (+4) + 1110 (-2):
  Result = 10010, take 4 bits = 0010 (+2) ✓
  Cin₃=1, Cout=1 → 1=1 → no overflow

1s Complement

Negate by flipping all bits.
Has TWO representations of zero: 0000 and 1111!
Range: -(2^(n-1)-1) to +(2^(n-1)-1)  (one fewer negative number than 2s complement)

4-bit: -7 to +7
-5 in 1s complement = 1010 (flip 0101)

Addition: add normally, then add any carry-out back to result (end-around carry)

IEEE 754 Floating Point

Single precision (32-bit):
  1 bit: sign (0 = positive, 1 = negative)
  8 bits: biased exponent (actual exponent + 127)
  23 bits: mantissa (fractional part of 1.xxx × 2^e)

Format: (-1)^s × 1.mantissa × 2^(exponent - 127)
        (implicit leading 1 in mantissa — stored fraction only)

Special values:
  Exponent=0, Mantissa=0:  ±0
  Exponent=255, Mantissa=0: ±∞
  Exponent=255, Mantissa≠0: NaN

Example: represent -6.5 in IEEE 754 single precision
  -6.5 = -1.101 × 2^2
  Sign = 1
  Exponent = 2 + 127 = 129 = 10000001₂
  Mantissa = 10100000000000000000000 (pad with zeros)
  Result: 1 10000001 10100000000000000000000

BCD — Binary Coded Decimal

Each decimal digit represented as 4 bits:
0=0000, 1=0001, ..., 9=1001
1010 to 1111 are INVALID in BCD

Example: 47 in BCD = 0100 0111
         (4 = 0100, 7 = 0111)

Not the same as binary! 47 in binary = 00101111

BCD addition: add normally; if sum > 9 (= 1010 or more), add 0110 (6) to adjust
  Example: 7+9=16
  0111 + 1001 = 10000 (binary result = 16)
  Sum > 9 → add 0110:  10000 + 0110 = 10110 = 1 0110 in BCD = 16 ✓

Quick Check

Q1. What is -13 in 4-bit 2s complement?

13 = 1101₂. But 4 bits can only hold -8 to +7.
-13 cannot be represented in 4 bits! (overflow)
In 5 bits: 13 = 01101, flip = 10010, +1 = 10011 = -13

Q2. IEEE 754 single: s=0, exp=10000010, mantissa=01000...0. What decimal value?

Sign = positive
Exponent = 130₁₀ → actual exp = 130-127 = 3
Mantissa = 0100... → 1.0100 in binary = 1 + 0.25 = 1.25
Value = +1.25 × 2^3 = 1.25 × 8 = 10.0

Q3. Overflow or not: 1010 + 1100 in 2s complement (4-bit)?

1010 = -6, 1100 = -4, expected result = -10
1010 + 1100 = 10110, take 4 bits = 0110 = +6 ← WRONG!
Cin₃=1, Cout=1 → 1=1 → No overflow? But result is wrong...
Wait: 0110=+6 ≠ -10. Actually Cin=Cout=1 means no overflow in 2s complement.
But -6 + (-4) = -10 which exceeds -8 (minimum 4-bit value) → IS overflow!
Re-check: Cin into bit 3 is the carry into MSB.
1010+1100: bit3: 1+1=10, carry out=1. Bit2: 0+1+1=10, carry to bit3=1.
MSB=bit3: carry_in=1, carry_out=1. Equal → no overflow?
But result 0110=+6 while expected -10...
Actual answer: -10 cannot fit in 4 bits (min is -8). Overflow DOES occur.
The detection rule: same_sign_inputs AND different_sign_result → overflow.
Both inputs have sign=1 (negative), result has sign=0 (positive) → OVERFLOW!

Key Points