BJT Biasing and Amplifiers

Design BJT biasing circuits and analyze BJT amplifiers.

Drafted with Aria, reviewed by the AiCanCode.org team. Spotted an error? Use Give Feedback at the bottom of the page.

Why it matters

Biasing fixes a stable quiescent operating point so an AC signal can be amplified without driving the transistor into cutoff or saturation. Emitter degeneration provides negative feedback against changes in transistor gain and temperature.

DC design

For an NPN voltage-divider bias circuit, replace the base divider by its Thevenin voltage V_TH and resistance R_TH. With collector resistor R_C and emitter resistor R_E:

I_B ≈ (V_TH − V_BE)/(R_TH + (β+1)R_E) I_C = βI_B; I_E = (β+1)I_B V_CE = V_CC − I_C R_C − I_E R_E

Check that the collector is above the base for forward active operation. A divider is approximately stiff only when its loading by base current is small; otherwise retain R_TH.

Small-signal gain

For a common-emitter stage with emitter at AC ground, neglecting r_o, A_v = v_o/v_be ≈ −g_m(R_C || R_L). With unbypassed emitter resistance, gain from base to collector is approximately −g_m(R_C || R_L)/(1 + g_m R_E), when β is large. Source resistance and the input divider further attenuate the overall input-to-output gain. Coupling and bypass capacitors affect low-frequency gain; device capacitances affect high-frequency gain.

Worked example

Let V_CC = 12 V, V_TH = 2 V, R_TH = 10 kΩ, R_E = 1 kΩ, R_C = 2 kΩ, β = 100 and V_BE = 0.7 V.

I_B = 1.3/(10000 + 101000) = 11.71 μA. I_C = 1.171 mA and I_E = 1.183 mA. V_E = 1.183 V, V_B = 1.883 V and V_C = 12 − 2.342 = 9.658 V. V_CE = 8.475 V, and V_C > V_B, so forward active operation is consistent.

At V_T = 25 mV, g_m = 0.04685 S. For no external load and a fully bypassed emitter resistor at the signal frequency, gain from v_be is approximately −93.7 V/V. If the emitter resistor is unbypassed, the large-β approximation gives −93.7/(1+46.85) ≈ −1.96 V/V. These are local small-signal gains, not permissible large-signal output swings.

Common mistakes

Ignoring divider loading; forgetting the emitter voltage in V_CE; assuming a bypass capacitor is a short at every frequency; and using active-region equations without checking saturation.

For GATE EC

Separate DC and AC equivalent circuits. Open capacitors for steady DC; at midband, short only those whose impedance is negligible relative to surrounding resistances. Set ideal DC voltage sources to AC ground when finding gain.

Quick check

  1. What feedback does an unbypassed emitter resistor provide?
  2. Does bypassing R_E change its DC bias contribution?
  3. Why is common-emitter voltage gain negative?

Answers: 1. Negative feedback. 2. No, an ideal capacitor is open for steady DC. 3. More collector current lowers collector voltage through R_C.

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